JCT - Volume 7 Issue 5 (May 2018)

 


Sr/No/ Title Pdf
1 Performance Analysis of Single phase 7 level CHBMLI
Manish Kumar and Prof. Santosh Kumar

ABSTRACT - Inverter is a device which is used for converting DC power into AC. Due to harmonic issue in conventional inverter researcher work in the field of multi-level inverter. A multi-level inverter starts from 3 level to n level. In the recent year due to increasing in renewable generation the scope of work in the field of multi-level increases day by day. The main work in this paper is to develop the easy topology for 7 level generations with the help of multilevel inverter. The proposed scheme is used for implementation for the different load which is used in domestic purpose. The multi carrier PWM technique is used for switching action. Finally the performance is verified by the use of MATLAB software by the experimental result. The THD is calculated for different load on proposed work.
Keywords - AMBA DC to Ac, MLI, , 2 Level, Renewable Energy, THD, CHB 7 level MLI etc. .
Page No. 01 - 07 .

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2 Multi Device Interface Implementation of I2C Master Bus Controller on FPGA with Arbitration and 10 Bit Addressing Scheme
Nitika Malpani (M.Tech Scholar) and Dr. Vikas Gupta (Head of department)

ABSTRACT - This research work shows the implementation of efficient hardware architecture in a FPGA Device to establish the I2C communication channel that will efficiently implement a communication from the FPGA device as the master and different peripherals as the slave. The important feature of proposed work I2C Master Bus Controller with Arbitration and 10 bit Addressing Scheme. In this research work, slave devices that are interfaced with the FPGA (Working as the I2C master device) are RTC device, EEPROM device, image sensor device and 10 bit addressing device. This module is designed using VHDL and results simulated on Modelsim 10.3a. Design synthesized using Xilinx ISE 14.1. Hardware implementation done using Diligent™ Atlys Spartan 6 Development platform. The proposed I2C protocol shows better as compare to previous I2C protocol in terms of number of logic units, flip flop, input output buffer (IOBs) and power efficiency. The presented I2C protocol consume 32mW power and number of logic unit are below 1% or (0.25%). The proposed I2C protocol special feature of arbitration, with the help of mange multiple device at single I2C protocol. .
Keywords – FPGA, I2C, RTC, EEPROM, FSM, VHDL, Arbitration. LUT, Flip Flop and power efficiency.
Page No. 01 - 05 .
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3 PAPR Reduction in OFDM Systems using Peak Windowing and Selective Mapping
Suyash Joshi and Prof. Devendra Patle

ABSTRACT -Orthogonal Frequency Division Multiplexing has now become one of the technologies which is leading the need for high speed and high spectral efficiency communication systems. The effective bandwidth utilization capability of OFDM makes it a natural choice for being accepted in many applications such as Wireless LANs, WiMax, LTE and contemporary technologies. A main problem faced by systems implementing OFDM is the high Peak to Average Power Ratio (PAPR). This problem can get exacerbated by the increasing number of sub-carriers corresponding to increasing number of users with each passing day. This leads to high peaks in the time domain OFDM signal leading to non-linear distortions. The aforesaid condition degrades the QoS of the OFDM system. This paper proposes a modified Selective Mapping (SLM) technique used juxtaposed with Peak Windowing for PAPR reduction. [2]It has been shown that the proposed technique achieves much lesser PAPR reduction compared to original OFDM, OFDM with Clipping and OFDM with selective mapping. The reduced PAPR can be attributed to the design of the selective mapping system and the signal resembling inverted Gaussian pulse cancelling out peaks effectively in the peak window.
Keywords— Orthogonal Frequency Division Multiplexing (OFDM), Peak to Average Power Ratio (PAPR), Non-Linear Distortion, Quality of Service (QoS), Selective Mapping (SLM) and Peak Windowing.
Page No. 1-5 .
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4 Performance Analysis of LCL based D-STATCOM for Low Voltage Grid
Simona Kapoor Chadha, Priyanka Mishra and Ashish Bhargava

ABSTRACT -With the increasing demand of power saving the use of non-linear load increase day by day. These loads produce harmonics in the power grid. This is harmful for the other load which is connected to the grid. There are several custom power device like SVR, SSSC, UPFC, are employee in the power transmission system. But in the distribution system only D-STATCOM is apply. D-STATCOM having LC type filter which produce high ripple at the PCC. This problem is removed by the high order LCL filter. In this paper discuss the modelling of LCL filter with D-STATCOM. The proposed model is developed in the MATLAB for finding the results. The results show the low harmonics in power grid.
Keywords— Custom Power Device, D-STATCOM, STATCOM, LCL filter etc.
Page No. 01 - 06 .
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5 A Modified Pentagon Microstrip Patch Antenna for Wi-Fi and Wi-Max Range
Archana Anchal and Prof. Sanjeev Shirvastva

ABSTRACT -In this paper proposed a pentagon shape based microstrip patch antenna (MSA) for wireless devices. Now a days Wi-Fi and Wi-Max devices are growing rapidly in wireless communication system. In the proposed method present a new modified pentagon patch shaped microstrip patch antenna. For the improvement of the result of pentagon patch antenna apply defected ground structure on ground side and improved result of proposed pentagon MSA. The proposed microstrip patch antenna shows better result as compare to other previous pentagon result in terms of return loss (S-11), Voltage standing wave ratio (VSWR), bandwidth and number of bands. The proposed modified pentagon antenna shows good result in the range of between 4.4 to 9.966 GHz, this range cover different communication band so it’s useful in wireless communication and voice communication.
Keywords – Micro strip patch antenna, shape of antenna, type of feed, frequency range, return loss, VSWR, Gain and Number of band.
Page No. 01 - 05 .
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