IJEA - Volume 6 Issue 9 (September 2017)

 


Sr/No/ Title Pdf
1 Tiny I2c (Ti2c) Protocol For Mobile Devices Using VHDL
Megha Patil,Utsav Malviya.

Abstract- A concept of MIPI is that a if huge amount of data to be transfer it must be unidirectional for high speed real time communication hence in mobile phone interfacing with camera and display are always unidirectional to maintain real time situations CSI and DSI are MIPI standard for high speed unidirectional interfacing. But on the other hand processor also needs to communicate controls with these devices (i. e. camera and display) for that proposed work has come up with idea to develop a Tiny I2C protocol which will be fast enough for send or receive controls commands between device and processor. Proposed work is a new design of I2C protocol which, which can be consider a Tiny I2C protocol it basically need by the mobile phone for communication of commands between camera or display devices, it is much faster and reliable then UART, SPI and PPI protocol. But as it is not using as main data communication proposed work come up with an idea that to develop a reliable simple and significantly faster protocol for commands communication between processor and camera and display. The whole design is implemented in Xilinx ISE 12.2 simulator targeted to Xilinx Spartan 6 FPGA.

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2 Highly Area & Speed Optimized FPGA based OFDM module: Review.
Pragya Dubey,Prof. Md. Arif.

Abstract- An orthogonal space-time block code (OSTBC) along with a minimum-BER and high SNR is Proposed and analyzed. the aim is to reduce the BER with new fully orthogonal fading matrix . The total number of branches that is being used for processing at the receiver is compared and computed. This paper works with Field Programmable Gate Array (FPGA) designing of an entire digital wireless communication for baseband system. The proposed BER tester also can be said BERT integrates the modules of a conventional communication system along with an AWGN channel into a FPGA. The BER is calculated for a 4x4 MIMO system.

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3 Design Of High Speed And Area Efficient Bcd Multiplier With Modified Convertors.
Ruchira Dixit,Prof. Abhishek Singh.

Abstract- Decimal multiplication is one of the most frequent operations used by many financial, business and user-oriented applications but current implementations in FPGAs are very inefficient in terms of both area and latency when compared to binary multipliers. In this paper we present a new method for implementing BCD multiplication more efficiently than previous proposals in current FPGA devices with 6-input LUTs. In particular, a combinational implementation maps quite well into the slice structure of the Xilinx Virtex-5/Virtex-6 families and it is highly pipeline-able. The synthesis results for a Virtex-6 device indicate that our proposal outperforms the area and latency figures of previous implementations in FPGAs .

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4 Skin Texture Analysis Based On Dwt And Proposed Multiple Otsu Thresholding: A Review.
Puja Dahiya.

Abstract-Skin texture analysis is one of than challenging issues in the field of medical diagnosis. Various types of skin diseases are affecting human life like skin dryness, fungus, and allergic symptoms. The objective of this paper is to analyze the skin disease using texture analysis of skin image and by comparing the test image to a defined images or reference images. The matching of test and reference images compared that yields the percentage of skin diseases in the captured skin texture image.

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